Competition Round 1 Results
On August 1st, the VDF Alliance launched a $100,000 competition to improve the security and scalability of blockchains through open source, high-performance hardware. Today we are excited to announce the results of the competition’s first round winner. Congratulations and thank you to Eric Pearson who was able to achieve a 78% increase in throughput over the baseline design! For his winning submission Eric was awarded $64,200, and his winning submission can be found here. We’d also like to thank everyone who submitted an entry in the first round of the competition. As a reward for your hard work we will be awarding $1,000 to each of the teams who submitted an entry but did not place first. Finally, we would like to thank our corporate partners, AWS, Synopsys, and Xilinx for their support of the competition and its logistics.
Competition Round 2 Launch
With Round 1 complete, Round 2 of the FPGA competition is officially underway. For the second round of the competition we are increasing the rewards from $3,000 to $5,000 per nanosecond reduction. In addition, we have also reset the prize pool back to a $100,000 maximum payout. The second round of the competition will end on December 30, 2019. For more information about the second round, please visit the VDF Alliance wiki.
New Prizes Announced
Today we are announcing two new $5,000 prizes focused on alternative approaches to low latency modular squaring for RSA VDFs. These two new competitions will end on January 30, 2020.
Prize #1 - Fastest Alternative FPGA Implementation: $5,000 will be awarded to the fastest VDF implementation on FPGA that uses an alternative approach than the ‘Ozturk’ algorithm. Potential algorithmic approaches include Montgomery, Barrett, and CRT.
Prize #2 - Best Research Paper on Low-Latency VDF Algorithms: $5,000 will be awarded to the research paper that describes the most promising and novel algorithm for a low latency RSA VDF. Best paper will be determined by a panel of judges and will be assessed on the novelty of approach, contribution to state of the art, and suitability for low latency ASIC implementation.
For the official rules on these prizes please see the wiki and feel free to reach out to hello@vdfalliance.org with any questions.
Get Involved!
The VDF Alliance is a collection of individuals, non-profits, academic institutions, and corporate partners building open source hardware for the blockchain ecosystem. If you are interested in participating please feel free to reach out to us by e-mail or on Telegram. If you are interested in learning more about our research and goals, please see VDFResearch.org, VDFAlliance.org, and the VDF Alliance wiki.